http://rhombus-tech.net/rock_chips/rk3288/news/
i now have 2 assembled PCBs with the exact same "fault" - which after talking to paulk and akaka on #linux-rockchip i *may* have a lead on how to get the DDR3 RAM up and running properly. we believe it's down to the impedance control register (ZQCR) which is being hard-coded in u-boot-rockchip rather than being allowed to "train". those values are suited for 6-layer 1.6mm PCBs - the impedance of tracks when you have an 8-layer 1.2mm PCB are *half* what they are for 6-layer 1.6mm PCBs.
l.
--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
impedance is function of width of line (with some adjustment of copper thickness) plus thickness of prepag directly below surface where your lines are. So, you need to compare what is on your last pcb and what is on your new pcb. best software to calculate this value is polaris and you can get some days for free if you ask for code but there are free alternatives out there like Saturn that we use. Beside that there are differential lines that you also need to match impedance. I am not sure but I doubt that via registers you can fix this problem.
also, in some cases you can put resistors in series of lines where you think you have problem.
basically, you need to find out what impedance need to be and where are you now in order to fix this, of course if this is really problem.
On Tue, Mar 7, 2017 at 2:54 PM, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
http://rhombus-tech.net/rock_chips/rk3288/news/
i now have 2 assembled PCBs with the exact same "fault" - which after talking to paulk and akaka on #linux-rockchip i *may* have a lead on how to get the DDR3 RAM up and running properly. we believe it's down to the impedance control register (ZQCR) which is being hard-coded in u-boot-rockchip rather than being allowed to "train". those values are suited for 6-layer 1.6mm PCBs - the impedance of tracks when you have an 8-layer 1.2mm PCB are *half* what they are for 6-layer 1.6mm PCBs.
l.
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
arm-netbook mailing list arm-netbook@lists.phcomp.co.uk http://lists.phcomp.co.uk/mailman/listinfo/arm-netbook Send large attachments to arm-netbook@files.phcomp.co.uk
--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Tue, Mar 7, 2017 at 2:07 PM, Hrvoje Lasic lasich@gmail.com wrote:
impedance is function of width of line (with some adjustment of copper thickness) plus thickness of prepag directly below surface where your lines are. So, you need to compare what is on your last pcb and what is on your new pcb. best software to calculate this value is polaris and you can get some days for free if you ask for code but there are free alternatives out there like Saturn that we use. Beside that there are differential lines that you also need to match impedance. I am not sure but I doubt that via registers you can fix this problem.
http://linux-sunxi.org/A10_DRAM_Controller_Calibration#Impedance_settings.2C...
apparently ZQ config registers do exactly that
also, in some cases you can put resistors in series of lines where you think you have problem.
yyyeah not in this case - there's not enough space between the rk3288 and the ddr3 ram ICs to fit 20 0402 resistors, even if i used 4-packs. i'd need to completely redo the entire DDR3 layout and that's something that i know will cost about 4 or 5 revisions (and around $10k in the process).
basically, you need to find out what impedance need to be and where are you now in order to fix this, of course if this is really problem.
yeah i will be checking the PMIC output voltages with a scope tomorrow. it's fairly certain that it's impedances - going from 290 to 300mhz really should not make a huge difference but it does.
l.
ok, these are internal resistors that help match impedance automatically. they are calibrated against reference resistors as they are not very precise. quite smart. but i still think you need to check impedance of your lines as i assume this calibration process is good to certain point, if lines are really bad that it cant help. However, you should try to enable this, maybe it will help.
Also,before redesign all board, check what impedance should be for all lines (datasheets), go through simulation software what impedance is now. Check what was impedance on previous version of PCB that worked (go through simulation again). So, maybe you can just change thickness of prepag (if that is possible) that match previous version of PCB (if you have same design of ddr3/mcu).
On Tue, Mar 7, 2017 at 7:16 PM, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Tue, Mar 7, 2017 at 2:07 PM, Hrvoje Lasic lasich@gmail.com wrote:
impedance is function of width of line (with some adjustment of copper thickness) plus thickness of prepag directly below surface where your
lines
are. So, you need to compare what is on your last pcb and what is on your new pcb. best software to calculate this value is polaris and you can get some days for free if you ask for code but there are free alternatives
out
there like Saturn that we use. Beside that there are differential lines
that
you also need to match impedance. I am not sure but I doubt that via registers you can fix this problem.
http://linux-sunxi.org/A10_DRAM_Controller_Calibration# Impedance_settings.2C_ODT_and_ZQ_calibration
apparently ZQ config registers do exactly that
also, in some cases you can put resistors in series of lines where you
think
you have problem.
yyyeah not in this case - there's not enough space between the rk3288 and the ddr3 ram ICs to fit 20 0402 resistors, even if i used 4-packs. i'd need to completely redo the entire DDR3 layout and that's something that i know will cost about 4 or 5 revisions (and around $10k in the process).
basically, you need to find out what impedance need to be and where are
you
now in order to fix this, of course if this is really problem.
yeah i will be checking the PMIC output voltages with a scope tomorrow. it's fairly certain that it's impedances - going from 290 to 300mhz really should not make a huge difference but it does.
l.
arm-netbook mailing list arm-netbook@lists.phcomp.co.uk http://lists.phcomp.co.uk/mailman/listinfo/arm-netbook Send large attachments to arm-netbook@files.phcomp.co.uk
--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Tue, Mar 7, 2017 at 6:46 PM, Hrvoje Lasic lasich@gmail.com wrote:
ok, these are internal resistors that help match impedance automatically. they are calibrated against reference resistors as they are not very precise. quite smart. but i still think you need to check impedance of your lines as i assume this calibration process is good to certain point, if lines are really bad that it cant help. However, you should try to enable this, maybe it will help.
i'll find out tomorrow soon enough. current settings are hard-coded to 40ohm driving and 155ohm termination (in the processor dram) which seems very odd.
Also,before redesign all board, check what impedance should be for all lines (datasheets), go through simulation software what impedance is now. Check what was impedance on previous version of PCB that worked (go through simulation again). So, maybe you can just change thickness of prepag (if that is possible) that match previous version of PCB (if you have same design of ddr3/mcu).
not a chance. increasing the line thickness to 4mil increases the impedance by something like 4%. there's no way i can use anything other than 1.2mm boards. there's ABSOLUTELY no way i can go to 6 layer. and the dielectric constant for 6mil board separation would have to be reduced to something insane like 1.0 in order to claw back the reduction in separation.
this *has* to have been taken into account in the design of DDR3 drivers / receivers, that there would be circumstances where the impedance is off like this.
l.
Also,before redesign all board, check what impedance should be for all
lines
(datasheets), go through simulation software what impedance is now. Check what was impedance on previous version of PCB that worked (go through simulation again). So, maybe you can just change thickness of prepag (if that is possible) that match previous version of PCB (if you have same design of ddr3/mcu).
not a chance. increasing the line thickness to 4mil increases the impedance by something like 4%. there's no way i can use anything other than 1.2mm boards. there's ABSOLUTELY no way i can go to 6 layer. and the dielectric constant for 6mil board separation would have to be reduced to something insane like 1.0 in order to claw back the reduction in separation.
this *has* to have been taken into account in the design of DDR3 drivers / receivers, that there would be circumstances where the impedance is off like this.
I am not sure if we understand each other here. Impedance of your lines are not function of thickness of board and thickness of line but thickness of prepreg and thickens of line. so, if you have for example 4 layer board you have copper conductor, then substrate then copper conductors etc and all of this are i.e. 1.2 mm thick. But when you calculate impedance you take into consideration only layer that is below surface if you line is on top (and because most signal lines are on top of PCB, if lines are in the middle of PCB board there are different calculation).
example here (h- thickness of prepreg)
http://chemandy.com/calculators/microstrip-transmission-line-calculator-hart...
So, for thickness of your lines you need to match with thickens of prepreg to be able to meet certain impedance. it does not mean that your total PCB thickens must be changed, you can vary some other layers of preprag, there are number of options with producers of PCB. You have to tell them you need 12 layer board and my layer of prepreg must be so and so thick, what can you offer me... Maybe this is possible, maybe not.
On Tue, Mar 7, 2017 at 7:22 PM, Hrvoje Lasic lasich@gmail.com wrote:
I am not sure if we understand each other here. Impedance of your lines are not function of thickness of board and thickness of line but thickness of prepreg and thickens of line.
understood (and not expressed clearly before that i understand). so please adjust prior reading to understand that i was talking about the distance between each of the 8 layers being reduced to 6mil (on a 1.2mm stack) where they were, in the Reference Design, well over 10mil (on a 1.6mm stack).
PADS has an unusual feature in that you can specify the stack entirely, including distance between layers, thickness of copper between layers, dielectric constant of each prepreg and also the dielectric constant and thickness of coatings top and bottom.
from that - and the thickness of tracks - PADS can calculate an advisory figure for impedance for each pin-pair or net. it can't do invdividual traces unfortunately.
i've been using this feature to do investigations, it matches well with the capability of the javascript-based calculator you kindly posted.
So, for thickness of your lines you need to match with thickens of prepreg to be able to meet certain impedance. it does not mean that your total PCB thickens must be changed, you can vary some other layers of preprag, there are number of options with producers of PCB.
the amount by which the prepreg of the required layers (1, 3 and 8)would have to be changed is so great as to *require* the total PCB thickness to also be changed. that cannot happen because then the case would not fit: there is a hard limit of 4.8mm. 1.2mm is for the PCB, 1.9mm for TOP components, and 1.6mm for BOTTOM. it's therefore simply *not possible* to go beyond a 1.2mm PCB thickness. the micro-sd card would need to be removed, for a start, a new type of PCMCIA connector sourced (due to the altered height).... i don't believe the processor would even fit.
also, increasing the thickness of the lines to beyond 4mil is also not possible, because this is a 0.6mm pitch BGA and there simply isn't room to get the lines out from between 2 BGAs (it's already only clearance of 3.5mil).
there *really is* no way to even *begin* to look at doing anything *remotely* like a redesign, as the design constraints are so strict and so complete that what i have is *literally* the only option.
yes i tried with 6 layer only but the routing of micro-sd, LCD, eMMC and GPIO was so horrendous that it was just far too risky to contemplate (as in: almost certain to fail). as it was, it was six weeks before i was happy to even put $1.5k towards the (resultant) 8-layer board.
anyway. i'll be back at my host's house later today, so can test out ZQ auto-calibration, see what happens. must rest.
l.
OK, understood, quite a lot of constraints. anyway, for calculation of individual traces impedance you can use satrun pcb software. it is free and has number of other calculation that are nice.
https://www.saturnpcb.com/pcb_toolkit.htm
At the time we made our PCB we also checked impedance with PCB producer (they make you strip of the board you use with same lines you have on your PCB and they physically measure impedance). It was quite close match to what we calculate with Saturn software). Hope it helps.
On Tue, Mar 7, 2017 at 8:52 PM, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
On Tue, Mar 7, 2017 at 7:22 PM, Hrvoje Lasic lasich@gmail.com wrote:
I am not sure if we understand each other here. Impedance of your lines
are
not function of thickness of board and thickness of line but thickness of prepreg and thickens of line.
understood (and not expressed clearly before that i understand). so please adjust prior reading to understand that i was talking about the distance between each of the 8 layers being reduced to 6mil (on a 1.2mm stack) where they were, in the Reference Design, well over 10mil (on a 1.6mm stack).
PADS has an unusual feature in that you can specify the stack entirely, including distance between layers, thickness of copper between layers, dielectric constant of each prepreg and also the dielectric constant and thickness of coatings top and bottom.
from that - and the thickness of tracks - PADS can calculate an advisory figure for impedance for each pin-pair or net. it can't do invdividual traces unfortunately.
i've been using this feature to do investigations, it matches well with the capability of the javascript-based calculator you kindly posted.
So, for thickness of your lines you need to match with thickens of
prepreg
to be able to meet certain impedance. it does not mean that your total
PCB
thickens must be changed, you can vary some other layers of preprag,
there
are number of options with producers of PCB.
the amount by which the prepreg of the required layers (1, 3 and 8)would have to be changed is so great as to *require* the total PCB thickness to also be changed. that cannot happen because then the case would not fit: there is a hard limit of 4.8mm. 1.2mm is for the PCB, 1.9mm for TOP components, and 1.6mm for BOTTOM. it's therefore simply *not possible* to go beyond a 1.2mm PCB thickness. the micro-sd card would need to be removed, for a start, a new type of PCMCIA connector sourced (due to the altered height).... i don't believe the processor would even fit.
also, increasing the thickness of the lines to beyond 4mil is also not possible, because this is a 0.6mm pitch BGA and there simply isn't room to get the lines out from between 2 BGAs (it's already only clearance of 3.5mil).
there *really is* no way to even *begin* to look at doing anything *remotely* like a redesign, as the design constraints are so strict and so complete that what i have is *literally* the only option.
yes i tried with 6 layer only but the routing of micro-sd, LCD, eMMC and GPIO was so horrendous that it was just far too risky to contemplate (as in: almost certain to fail). as it was, it was six weeks before i was happy to even put $1.5k towards the (resultant) 8-layer board.
anyway. i'll be back at my host's house later today, so can test out ZQ auto-calibration, see what happens. must rest.
l.
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after finding various bits of documentation i'm going to be testing out the following settings, which match the (known, calculated) impedance of the EOMA68-RK3288 board (around 50-60 ohms instead of 100-120 of the Reference Design):
http://www.skhynix.com/product/filedata/fileDownload.do?seq=6790 MR1: bits 9,6,2 = b001 = RZQ/4 = 60 ohms ODT bits 4,3 = b00 = CAS disabled bits 5,1 = b00 = RZQ/6 = 40 ohms output driver impedance bit 7 = 0 = write-leveling disabled bit 11 = 0 = TDQS disabled bit 12 = 0 = output disabling not enabled bit 10 reserved bit 8 reserved MR2: bits 10,9 = b01 = RZQ/4 = 60 ohms ODT bits 6,5,4 = b001 = CAS Write Latency 6 bits 3,2,1 = b100 = partial array self-refresh 3/4 array
arm-netbook@lists.phcomp.co.uk
-
Hrvoje Lasic -
Luke Kenneth Casson Leighton