http://elinux.org/Embedded_Open_Modular_Architecture/CompactFlash#Table_of_E...
if you recall, someone kindly pointed out that USB3.1 does *not* need two sets of Tx/Rx differential pairs but only one. so ironically that means that four pins on an extremely low pincount standard are now free. i thought, "ah ha! should add a 2nd USB2 to EOMA50!"
... but should it?
one of the things about SoCs that are that small, they can fit onto a 43x30mm PCB is: the probability of the pincount being high enough for them to have two USB2 interfaces is... debatable. the GR8 definitely does but that's just one SoC. and if it *doesn't*... then fitting a USB hub on there to provide two USB2 interfaces is going to be a bitch-and-a-half.
also, two new pins are definitely free: "by default" i would make those EINT2 and EINT3 *but* the other option is to make them SPI data lines 2 and 3 (for 4-bit DDR SPI).
choices, choices... i'm leaning towards 2 extra EINTs particularly as i have an idea in mind for a modular smartphone, and the addition of extra EINT-capable GPIO would allow a sub-module standard which has an EINT line "per module". mind you a break-out GPIO device (such as oo i dunno... a $1 STM32F!) is probably going to be needed for that design concept anyway. bizarre, isn't it: you can either choose a $1.50 dedicated GPIO breakout IC which only has 12 pins... or you can choose a $1 EC which has 32 or 48 pins and has GPIO, USB, SPI, ADC, DAC, I2C, UART... so bizarre.
anyway.
thoughts appreciated.
l.
--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
My vote is for them to be SPI lines. That means more/faster RAM, right? RAM is the most 'visible' upgrade, performance-wise, that anyone can do to a (currently regular) computer... I realize you can't upgrade RAM within an EOMA card, but hey -- all the more reason to streamline it :)
A pity that we can't have a "modular" (socketed/slotted) EOMA68 card... I realize CPU sockets are kind of going the way of the dodo, but I'd still like to be able to at least upgrade the RAM if I want to, without building myself a reflow toaster oven or some crap like that. I wouldn't say no to EOMA-specific RAM modules -- heck, use those awful super-tiny fiddly-as-crap Hirose connectors if ya have to (I hate 'em with a passion, but they do friggin' work) -- OEMs did proprietary RAM modules on laptops for years bordering on decades, back when you had to distinguish between "luggable" (Osborne 1, Compaq Portable), "clamshell" (GRiD Compass, modern junk), "partial clamshell" (IBM 5140 PC Convertible), etc... I have a Toshiba 3400CT like that (it's an early clamshell with a 486 inside). I'll never be able to afford a 16meg module for it, as a result, but (speaking to the whole group here) I think our Luke has *ahem* a bit more dedication to keeping things going and available for people, than Toshiba did back then...!
On Sat, May 20, 2017 at 10:18 PM, Christopher Havel laserhawk64@gmail.com wrote:
My vote is for them to be SPI lines. That means more/faster RAM, right?
RAM... where did you get that idea from... *thinks*... DDR (double data rate), you might have confused that with the JEDEC RAM standards named "DDR1,2,3,4"
so no it does not mean more/faster RAM.
SPI's 4-data-lines mode (which happens also to have optional double-data-rate as part of the extension to SPI *on* those 4 data lines) is an unusual rarely-used mode of SPI which isn't very often supported on SoCs.
so if there was an EOMA50 housing which requested it, almost certainly the SoCs would have to ignore it anyway, and do 2-wire (non-DDR, serial) SPI anyway... or look at doing 4-bit bit-banging at 50-100mhz. which would be quite CPU-intensive.
i sort-of added it to EOMA68 for the hell of it, because the wires were there. but for EOMA50 there's less pins so...
l.
Sorry... DDR = RAM in my head. I *am* a computer nerd!
EINTs sound best, then.
OT: why no RAM slots in EOMA68? Routing too hard? No room? Both? Other, please specify...?
--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Sat, May 20, 2017 at 11:40 PM, Christopher Havel laserhawk64@gmail.com wrote:
Sorry... DDR = RAM in my head. I *am* a computer nerd!
:)
EINTs sound best, then.
don't need an extra UART, SPI's already there, I2C's already there, how about another I2C bus? 1 PWM's already there...
yeh i'm sorta-settling on 2x EINTs...
*mulling*....
OT: why no RAM slots in EOMA68? Routing too hard? No room? Both? Other, please specify...?
what's the practicality of either:
(a) fitting a 70x40x6mm SO-DIMM onto a 78.1x43x5mm PCB?
(b) including 90+ pins for DDR3 onto a 68-pin connector?
MicroDIMMs. http://us.apacer.com/products/INDUSTRIAL-Micro-DIMM-DDR3-1333/ Requires those awful, awful Hirose connectors, though... and they're not widely available (by which I mean "sold on eBay").
Or a proprietary (by which I mean "part of the standard but not used anywhere else") module setup, with the same drawbacks...
I was really thinking it would only fit the Type III cards anyways. With the Type IIs, it sounds like you could 'cheat' by having a sheet of plastic over a shell cutout... but those size requirements are a bit, well, oy. You've got a point there. I didn't realize the outlines were that close.
--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Sun, May 21, 2017 at 12:32 AM, Christopher Havel laserhawk64@gmail.com wrote:
MicroDIMMs. Requires those awful, awful Hirose connectors, though... and they're not widely available (by which I mean "sold on eBay").
hmmm.... type III cards maaaybeee... 's'gonna be ridiculously tight though. and expensive.
l.
Sorry 'bout that.
...and for derailing another topic. We all have our talents, I suppose :P
On 05/20/2017 06:35 PM, Luke Kenneth Casson Leighton wrote:
On Sat, May 20, 2017 at 10:18 PM, Christopher Havel laserhawk64@gmail.com wrote:
My vote is for them to be SPI lines. That means more/faster RAM, right?
RAM... where did you get that idea from... *thinks*... DDR (double data rate), you might have confused that with the JEDEC RAM standards named "DDR1,2,3,4"
so no it does not mean more/faster RAM.
SPI's 4-data-lines mode (which happens also to have optional double-data-rate as part of the extension to SPI *on* those 4 data lines) is an unusual rarely-used mode of SPI which isn't very often supported on SoCs.
so if there was an EOMA50 housing which requested it, almost certainly the SoCs would have to ignore it anyway, and do 2-wire (non-DDR, serial) SPI anyway... or look at doing 4-bit bit-banging at 50-100mhz. which would be quite CPU-intensive.
what is eoma50 out of curiosity?
i sort-of added it to EOMA68 for the hell of it, because the wires were there. but for EOMA50 there's less pins so...
l.
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zap please remember to cut unnecessary context, thanks.
On Sun, May 21, 2017 at 1:40 AM, zap calmstorm@posteo.de wrote:
what is eoma50 out of curiosity?
ok so i have cut unnecessary context on your behalf, after searching quite hard to find this one single quetsion in amongst the unnecessary context.
answer: the page with the link to the standard, which contains the answer to your question, is listed at the beginning of this thread.
l.
On 05/20/2017 08:59 PM, Luke Kenneth Casson Leighton wrote:
zap please remember to cut unnecessary context, thanks.
On Sun, May 21, 2017 at 1:40 AM, zap calmstorm@posteo.de wrote:
what is eoma50 out of curiosity?
ok so i have cut unnecessary context on your behalf, after searching quite hard to find this one single quetsion in amongst the unnecessary context.
answer: the page with the link to the standard, which contains the answer to your question, is listed at the beginning of this thread.
I checked my messages and couldn't find the original thread, unless it is a router....
but if you would like I will not ask anymore.
l.
arm-netbook mailing list arm-netbook@lists.phcomp.co.uk http://lists.phcomp.co.uk/mailman/listinfo/arm-netbook Send large attachments to arm-netbook@files.phcomp.co.uk
On Sun, May 21, 2017 at 3:18 PM, zap calmstorm@posteo.de wrote:
what is eoma50 out of curiosity?
answer: the page with the link to the standard, which contains the answer to your question, is listed at the beginning of this thread.
I checked my messages and couldn't find the original thread,
i did not say "the original thread" i said "the beginning of *this* thread". how is the word "this" interpreted as "prior to this"?
unless it is a router....
http://lists.phcomp.co.uk/pipermail/arm-netbook/2017-May/013828.html
so in that message, which is the *beginning of the thread not a prior message which could be considered to be the origin of this thread*, right at the very top is the link to the EOMA50 standards page:
http://elinux.org/Embedded_Open_Modular_Architecture/CompactFlash#Table_of_E...
l.
arm-netbook@lists.phcomp.co.uk
-
Christopher Havel -
Luke Kenneth Casson Leighton -
zap