On Tue, Aug 25, 2015 at 4:18 AM, Daniel Serpell daniel.serpell@gmail.com wrote:
Hi!,
On Mon, Aug 24, 2015 at 9:45 PM, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
On Tue, Aug 25, 2015 at 12:31 AM, Daniel Serpell daniel.serpell@gmail.com wrote:
The schematic is here: https://cdn.sparkfun.com/datasheets/BreakoutBoards/Logic_Level_Bidirectional...
To assure that the output is low when the LV input is disconnected, you could add a resistance from the input to ground, I would use a 2k resistor, so that at 1.8V the gate has 1.5V, setting a low state in the output.
This circuit is cheap, and you would use only 3 resistors and one FET.
ta daniel, yes i saw this circuit around in the exploration i've been doing.
the only problem i have with it is this:
when the input is at 0V, i assume that means that the other side of the MOSFET also goes to 0V (plus a little bit - say 0.1V).
however if the input were to go to, say.... 0.6V (because that's within TTL levels), then the output would *also* go to 0.6V, plus a little bit, that's 0.7v.
No, it will be higher, because in that case the MOSFET would turn off a little more and it's resistance would go up (1.8V at LV minus 0.6V = 1.2V at gate).
ok. so.... if the input was at 0V the output would go to... what? if it's above 0.69v, then that level-shifting circuit can't be used as-is. BOOT0 simply wouldn't be enabled: it requires below 0.69v when the STM32F072 is operated at 3.3v.
But I don't understand why you are talking about "TTL" levels here, as:
- I could not think on any way that an old TTL output device would be
connected to that input. 2) TTL devices had about 0.2V output, with relatively high current output.
i needed a specification for EOMA68, so i picked one. TTL seemed like a good idea. we're still in "development" phase so an alternative could be picked... i don't mind changing it to e.g. CMOS now that there's a VREFTTL.
In fact, the problem with TTL devices was that the HIGH output had low current capability, so you need to assure that the HIGH input threshold was low enough to allow for the low driving currents.
hmmm ok. so putting CMOS as the specification would be better.
In your case, you need the input to toggle on a variable voltaje digital output, (1.8V or 2.5V or 3.3V),
.... which needs to be specified, then every possible combination verified...
unfortunately this isn't like a "normal" electronics single-board design ( make a decision, pick a CPU, pick an EC, test a couple of voltages and then forget about it).
it's a bit of a risk developing with only one threshold voltage (most of the SoCs i've used have been 3.3v) but all the circuits need to cater for variable future VREFTTL.
whatever is picked, though, this particular circuit has an added wrinkle. even if CMOS is picked as the EOMA68 GPIO specification, it cannot be assumed that the low voltage *will* be reached, it has to be assumed worst-case i.e. that the low voltage will be 0.3*VREFTTL (which in the case of 3.3v will be 0.99v).
BOOT0 has that *different* low threshold from the rest of the [CMOS] STM32F072 GPIO pins: the formula is 3.3 * 0.3 - 0.3.
so whatever circuit is used, it *must* output a voltage *below* 0.69v even when its input is between 0 and 0.99v... when VREFTTL is 3.3v.
i think... i have one pin spare: i think it might be a good idea to send over VREFTTL to the board and look at a unidirectional level shifter IC.
l.