2014-05-26 15:51 GMT+02:00 Luke Kenneth Casson Leighton lkcl@lkcl.net:
On Mon, May 26, 2014 at 2:38 PM, mike.valk@gmail.com mike.valk@gmail.com wrote:
2014-05-23 22:57 GMT+02:00 Luke Kenneth Casson Leighton lkcl@lkcl.net:
<snip>
btw, joe... you'll like this i am sure, but it is a bit of a risk.
the inclusion of SATA on EOMA68, it is cutting us off from a ton of CPUs that are coming out for the tablet,tablet,tablet,tablet market - the $12 rk3188 for example, which would otherwise be perfect.
so i am inclined, especially because i anticipate USB3 SoCs coming along over the next 8-9 years, to replace SATA with USB2 and 2 other lines. i think, joe, that one of them should be the "TTL high Power Line" for the voltage levels on GPIO (and UART).
Since we going for interoperability USB makes more sense indeed.
USB1,2,3 is
somewhat backward compatible, interoperable and is seems the better
choice.
yes. read the EOMA68 spec. the section on USB is based on exactly this premise... and explicitly bans SoCs such as some of the TI ones which implement 480mbit/sec high-speed *only* on the USB2.
Yeah that was a lame direction. Especially since USB2 certification demands a USB1.0/1.1 compatiblity.
if such SoCs were to be used they would need to be firewalled behind a USB2 Hub IC that could do the down-level (to USB1.1 and 1.0) protocol conversion.
Can we get away with a USB2 only on a USB3 connector?
of course.
That means that every USB3, slave, device must accept a USB1/2 link, from a master, EOM68 card, even if a USB3 connector is present on the device holding the EOMA68 card. USB3 requires 5 extra pins, IIRC.
arm-netbook mailing list arm-netbook@lists.phcomp.co.uk http://lists.phcomp.co.uk/mailman/listinfo/arm-netbook Send large attachments to arm-netbook@files.phcomp.co.uk