On Thu, Aug 7, 2014 at 6:58 PM, Manuel A. Fernandez Montecelo manuel.montezelo@gmail.com wrote:
2014-08-07 16:33 Guillaume FORTAINE:
Is this any different in concept from OpenRISC 1000 (or1k)?
by a long margin: yes. OpenRISC i don't believe was ever planned to run at the kinds of speeds that RISC-V plans to operate at. http://riscv.org/download.html#tab_rocket shows that they are producing benchmarks for operation at 1ghz. the RISC-V architecture appears to be designed as 64-bit from the ground up, and there also appear to be room for instruction set extensions as well: http://riscv.org/faq.html#simd
With or1k we have already ~6.6k architecture-dependent (that have to be compiled) source packages from Debian available, and being updated whenever they are uploaded to Debian unstable. These are readily available for simulations and for people who can synthesise this in a FPGA.
http://riscv.org/getting-started.html
full toolchain, port of qemu, and an FPGA port.
no debian port yet though. biiit early for that :)
l.