On Aug 18, 2017, at 20:13, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
On Fri, Aug 18, 2017 at 5:51 PM, Richard Wilbur richard.wilbur@gmail.com wrote:
You bring up an interesting point: what other current return paths are in the same vicinity? I have not analyzed that in any detail. At least there are no other lines from signal source to signal sink that I know of that cross the region of the board where the high-frequency HDMI signals are routed. Also, to my knowledge we don't have segmented or restricted ground planes that would isolate regions with a higher-impedance reference.
CEC etc. all follow roughly the same path, on layer 3 (separated by GND).
i just noticed that SD0 runs round the back of the HDMI 1st set of VIAS (with no GND separation) on layer 3 - i've removed the SATA power (not being used) so i can shift them up a bit
some GPIOs cross on layer 3 as well, just near the GND shielding near those first vias...
not much.
Layer 3 always has ground separation from layer 1 in the intervening ground plane on layer 2 and likewise from layer 6 by layers 4 and 5. So I'm not worried about those signals.
Regarding the SATA power: Is it an important part of providing a SATA interface? If so, I would suggest not limiting our options on this card. My understanding is that SATA is significantly more efficient for harddisk data interface than USB.
Regarding SD0: To what interface does it belong? What is the maximum data rate on this line?