On Mon, Dec 18, 2017 at 3:02 AM, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
On Mon, Dec 18, 2017 at 7:02 AM, Richard Wilbur richard.wilbur@gmail.com wrote:
On Sun, Dec 17, 2017 at 11:34 PM, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
On Mon, Dec 18, 2017 at 6:31 AM, Richard Wilbur richard.wilbur@gmail.com wrote:
- Ground keepout under whole ESD component(s) on adjacent reference
ground plane (layer 2 for ESD on layer 1, layer 5 for ESD on layer 6), ground fill on deeper layer (layer 3 for ESD on layer 1, layer 4 for ESD on layer 6). Ground fills connected as always using vias (some probably already adjacent).
clear... except which one to actually deploy :)
Well, I read about #2 in the TI High-Speed Layout but I like #1 better because we have high-frequency signals in parallel on both sides of the board and I'd feel better because I expect less cross-talk with #1. #1 is a hybrid where we double the distance to the reference ground plane but still have ground shield between high-frequency signals that would otherwise want to radiate/couple.
yehyeh, makes sense to me. okay! it's also much more straightforward.
After sleeping on it, I'd recommend making the new, deeper ground fill slightly larger (~5mil? margin) than the ground keepout on the original reference plane--as long as that's not too hard to accomplish.