On Fri, Dec 29, 2017 at 6:57 PM, zap calmstorm@posteo.de wrote:
Wow... that's freakin awesome. Any idea when such a processor will be implemented into the eoma68 standard?
if standard chip design is anything to go by... probably 18 months.
I wonder how long it has been being developed though so far. :)
dunno. they're using something similar to Chisel except where chisel is written in java, bluespec (or whatever) is written in Haskell. apparently it's possible to write a processor core in about 6 weeks flat with it... and the advantages are, you can do formal mathematical proofs on it.... *because it's Haskell*. outputs Verilog or VHDL i forget which.
anyway, the integration is where it's going to get complicated. making sure the interfaces work, and pre-writing linux kernel drivers to run on FPGAs *before* committing to silicon and so on.
we _will_ have access - free - to the university's 180nm fab, which is a bit... high power and very slow these days but at least it *might* be useful to at least prove things like e.g. sd/mmc work and so on.
l.