On Sat, Jul 6, 2019 at 3:49 AM David Niklas doark@mail.com wrote:
It looks like there are some quantum interferences as well as EM and RF issues, *and* probably some power and layout issues in the tinier geometries, all of which the Foundries absolutely do not want the customers to know about, because it constitues "reverse engineerable knowledge" about how the Foundry lays out the chips, and a competitor Foundry could get hold of that and start their own multi billion dollar money spinner.
Here's where closed source IP really confuses me: If a "money spinner" tried to do that wouldn't they be sued, pay royalties and regret it for the rest of their existences?
in the meantime, whilst such a court case is underway, they're losing literally billions due to the upstart having "stolen" their knowledge. a CSMC employee actually did that to TSMC: worked on TSMC's 28nm line, went back to China and started CSMC's 28nm line with the knowledge.
it took years for the court case to go through, as it's in a different international jurisdiction.
Bottom line is, we're literally decades and hundreds of millions of dollars away from libre foundries. I am probably out on those estimates by 1 to 2 orders of magnitude.
Are we talking any libre foundry, or some particular nm size (not that a nm is actually used to describe a nm anymore)?
outside of my ability to say.
Luckily, DARPA recognises the problem and put up USD 150m to create fully libre automated ASIC layout software. It's a start.
Interesting. For posterity, here's a link (with HTML garbage removed): https://www.fbo.gov/index?id=a32e37cfad63edcba7cfd5d997422d93
that is (was) a session link, now invalid. what keywords did you use?
l.