On Tue, Nov 24, 2015 at 3:30 PM, Paul Boddie paul@boddie.org.uk wrote:
On Tuesday 24. November 2015 14.42.44 Luke Kenneth Casson Leighton wrote:
On Tue, Nov 24, 2015 at 9:06 AM, Paul Boddie paul@boddie.org.uk wrote:
This is great news! I also like the 2GB RAM support - with many ARM single- board computers still only supporting 1GB, it makes sense to go for the maximum here -
those kinds of decisions i believe are usually made based on the faulty logical analysis which is summarised as "but... but.... the processor costs less than the memory!!!"
I suppose that you could cluster several of them if they each only provided, say, 1GB RAM, but then you need the convenient infrastructure to make that easy. Indeed, a multi-slot cluster unit would be nice with EOMA-68, and I think someone mentioned something similar earlier in the year.
yes. primary justification for this is to enable rack-mount low-power modular servers.
As I understand it, 32-bit MIPS divides the addressable memory space in two, meaning that 2GB of actual memory is the limit.
rright. as ingenic's MIPS is home-grown they inform me that the jz4775 can actually address up to 3GB of RAM. however that would involve a... rather complex board arrangement, of a mixture of ICs or to simply put in 4GB DDR total and ignore 1GB of it.
I haven't paid enough attention to 32-bit ARM recently to say whether similar limits apply there,
absolutely they are - because the peripherals are all memory-addressed, and the boot ROM also has to be addressed somehow.
to make life a bit simpler (save some silicon space), usually only a few of the address bits are utilised to make the decision "address this peripheral yes/no". so hilariously you can sometimes address the exact same peripheral at regularly-spaced (large) memory intervals. this was i believe the case with at least the intel pxa 270: it was over 10 years ago but i do seem to recall seeing the exact same peripherals at different addresses when reverse-engineering an XDA smartphone.
in short... yeah :)
l.