On Saturday 2. May 2015 21.01.10 Luke Kenneth Casson Leighton wrote:
On Sat, May 2, 2015 at 7:26 PM, Manuel A. Fernandez Montecelo
manuel.montezelo@gmail.com wrote:
2015-05-02 18:40 Luke Kenneth Casson Leighton:
yeeess... but to do so requires those steps (1) through (6) i told you about. you can't just drop a processor onto a board and hope for the best, you actually have to custom-design the *entire* PCB - 300 components usually, thousands of individual wires (each one with rules).... it's not as straightforward as "yeah just put a processor down, it'll work".
Erm, I wonder if you are confusing me with another person, because I don't remember any conversation with you about PCBs or any steps, at least recently???
I think Manuel interpreted this as a reply to him directly: the singular "you" rather than the plural "you".
[...]
none of those. the answer remains as i said: steps (1) through (6) have to be satisfied, in addition to there being sufficient end-user interest to justify the investment of time and money.
Well, if we were just talking about FPGAs (wasn't that proposed at some point?), then we could probably run through steps (1) through (6) relatively quickly. ;-)
Apart from being academics, the founders of the project are co-founders of RaspberryPi, and they have as advisors "bunnie" of Novena laptop fame --among others-- and Google's Project Ara, so I think that it's not a typical academic project.
none of those people have _actually_ designed a processor, nor have they the commercial experience in designing a processor to be targetted at a specific market, nor have they *actually* been through the process of sourcing and licensing (or designing) the hard macros and associated test vectors, nor have they been through the costings and project management aspects associated with bringing a processor to market.
in other words, each and every one of the people you mentioned has absolutely zero experience in processor design and manufacturing.
I think the project also has more experienced people on board, as opposed to mere figureheads and supporters with considerable experience in somewhat different fields. For example, Julius Baxter (one of the named figures) does have a "soft-CPU" design to his name already and considerable experience with OpenRISC. I mentioned FPGA tools previously, and the Yosys suite is participating in some way in Google Summer of Code under the lowRISC umbrella, as are various other people associated with OpenRISC.
Moreover, the RISC-V architecture on which lowRISC is based has David Patterson on board, who was the originator of Berkeley RISC which was developed further into SPARC, so we're not talking about a group of pundits waiting for other people to do the work. Indeed, there's a RISC-V core that has supposedly been "proven" on/for various manufacturing processes, so those people aren't messing around.
We aren't going to see anything ready-to-use from lowRISC this year, according to their own schedule, but it could be interesting to watch.
Paul
P.S. I imagine the reason why Imagination Technologies launched some academic FPGA initiative or other recently is because freely-licensed cores based on unencumbered architectures could easily steal the academic/educational show.