Sent from my iPhone
On Sep 17, 2017, at 01:29, Luke Kenneth Casson Leighton lkcl@lkcl.net wrote:
hiya richard, ok yes, took a look at what you wrote, http://lists.phcomp.co.uk/pipermail/arm-netbook/2017-September/014681.html and yes, really, a cutout and markup of the bits of the image you're re referring to would really do it.
Will see what I can do after looking at the new images.
i've removed the 15mil clearance design rule, reverted back to the *standard* 6mil clearance that was is in place everywhere (and is now back in place as the standard blanket rule, no exceptions, i.e. it's all 6mil clearance from everything-to-everything.. oh... except the board edge of course, which is and always was 12mil)
I'm mildly surprised to hear that the default clearance (everything-to-everything) used to be 6mil: either it changed and I missed the announcement or it was that value before I got involved. The value I understood for minimum clearance was 5mil[1].
The recommendations regarding impedance are based on space-restrictions and the minimum trace size and spacing you quoted as 5mil. The differential pair impedance calculations and recommendations are based on the distance between traces in the pair being near-field and the clearance to other traces putting them in far-field. That's why we're striving to keep the spacing, s, between the traces of the differential pair small so we can achieve far-field (clearance d>=3s) with the other traces (in our limited space).
so *part* of what you wrote is slightly out-of-date having done the flood-fill and also removed the GND spacing tracks...
Sounds like progress.
also suggest in future we refer to the online image names in full e.g. http://rhombus-tech.net/allwinner_a10/news/eoma68-a20-275-layer1-hdmi.jpg as that is unambiguous. so i'll stop sending images to the list and will use the URLs instead.
I think that is a fine idea. More specific with less guesswork involved.
Reference:
[1] http://lists.phcomp.co.uk/pipermail/arm-netbook/2017-July/014402.html