yay i believe i may have _finally_ tracked down the issue with the
DDR3 RAM initialisation - not the actual underlying problem with the
PCB layout (which is down to impedance and is probably going to need
insertion of a bank of... probably like... 60-80 resistors...
*sigh*...) but with initialising the RK3288 RAM controller at the much
lower clock rate of 200mhz.
i _really_ should have checked the rkclk_configure_ddr function in
u-boot-rockchip's clk_rk3288.c file first, but i have to say it's been
great fun doing reverse-engineering again. i basically took the
rkbin/rk32/ 32_LPDDR2_200MHz_LPDDR3_200MHz_DDR3_200MHz_20150318.bin
file which rockchip supplied - and which is confirmed as successfully
initialising the DDR3 controller (at 200mhz) on the EOMA68-RK3288
board - and have been rapidly working it back towards c-code.
... probably unnecessarily as it turns out, because *actually* what i
quite likely only needed was to add "200mhz" as one of the supported
switch-statements in rkclk_configure_ddr! ooops....
now, it has to be said that if i had not got as far through the
reverse-engineering as i have, i would not have had the information
that i needed in order to easily work out the PLL settings for the
200mhz clock-rate.
the reason is quite straightforward: the proprietary binary is
SIGNIFICANTLY more comprehensive in its initialisation,
parameterisation, safety-checking and follow-up testing of the memory.
i can see _where_ the u-boot-rockchip sdram initialisation comes from:
many of the functions are the same but the key strategic ones are
significantly improved.
so, anyway, it's late evening, so i cannot go round to my host's house
straight away and test this out, but i will do tomorrow first thing :)
l.
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
> Ok so basically this will allow type II cards( smaller) to fit into type
> III housings and utilize higher clocks ?
I think the idea is a bit better than that even. I think that by default
all Type II cards must adhere/support the 5W upper thermal limit. However, even
in a Type II slot the card may negotiate with a housing and if the housing
can support heat removal from the card to allow it to operate at a higher
(10W?) limit, then the card may then utilize a faster clock rate or
activate more cores (at that point).
> Also from my understanding the
> type III card will be the physical form factor used for the EOMA 200
> standard ?
No, I think this is a misunderstanding. I'm pretty sure that the EOMA-200
standard will have 202 pins Please see the following page for details:
http://elinux.org/Embedded_Open_Modular_Architecture/EOMA-200
Just in case you all haven't seen this before (or haven't thought about
it). I was thinking that since it seems like lots of prototype boards are
being made perhaps a prototype circuit board printer like the following
might be useful for prototyping some of the simpler support boards (e.g.
some of the laptop PCBs).
https://voltera.io/
I'm not exactly sure how much cheaper (if any) that it would be compared to
getting prototype boards printed up by another company but, I could imagine
that being able to print up your own circuit boards would probably help
speed up the design/prototype iteration cycle.
-Mike
On Thu, Mar 9, 2017 at 3:46 PM, mike.valk(a)gmail.com <mike.valk(a)gmail.com> wrote:
thanks for the explanation, mike.
> So for EOMA we must set/invent a standard which Installers can use
> regardless the SoC type used in the EOMA card.
ah. right. the way i see it, the only thing that needs to happen is
that the card has to have enough on-board storage to get to u-boot (or
similar) where it can then recognise the EOMA68 I2C EEPROM (and get
the ID info) or for it to (pretty much) always boot externally and do
the same.
anything beyond tthat needs to be analysed *really* carefully, right
through its impllications down the *entire* lifecycle. which is why i
currently have it as (pretty much) "card must self-boot and must adapt
to EOMA68 EEPROM ID" and it's left as generically as that
> On A20 et.al. there is the FEL mode. Which is initialized by that first
> loaded program.
from ROM.
> In this FEL mode you can push an image over USB-OTG. But
> that requires an active USB host not just an USB thumb drive.
i do this all the time. i don't develop for the A20 in any other
way. when i see the shit that people get themselves into *even though
usb-fel was written years ago* by trying to un-fuck their systems
using LIVESHIT.EXE and other crap i'm just... staggered and genuinely
confused.
it's *real* simple and needs just *seven* lines of bash script:
fel write 0x2000 ./fel-boot-spl-EOMA68_A20_2GB.bin
sleep 1
fel exe 0x2000
sleep 1
fel write 0x4a000000 u-boot.new.bin
sleep 1
fel exe 0x4a000000
the fel-boot-spl.bin is actually the u-boot-spl.bin executable that's
compiled by default in u-boot if you select "CONFIG_SPL". the
u-boot.new.bin is u-boot without the spl part tacked onto the front.
it really couldn't be simpler. you can if you want directly upload
the linux kernel, script.bin, dtb file, initramdisk WHATEVER YOU LIKE
directly into memory and then execute it DIRECTLY. you don't even
need u-boot to do it.
> http://linux-sunxi.org/FEL/USBBoot#Booting_U-Boot_over_USB
> http://linux-sunxi.org/BROM
>
> So the question is are "we" going to build such a thing?
i'm yet to be convinced that it's necessary, beyond adapting u-boot
and the linux kernel to read and adapt to the ID in the EOMA68 EEPROM.
what specifically did you have in mind?
l.
>
>>
>>
>> -- hendrik
>>
>>
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hi,
in order to work towards getting the laptop out in phases i'm looking
to create an intermediary design that utilises the exact same PCB1
from the laptop, exact same LCD, without the STM32F board (PCB2) and
without the battery charger board (PCB3)... which in effect makes an
"LCD monitor" when utilised with a passthrough Card or an "all-in-one
PC" when utilised with a card that has a processor in it.
a review of the (simple) schematics for PCB4 would be really useful,
although they are in fact very very simple.
please note though that i will be delaying prototyping PCB4 and PCB1
until the latest micro-desktop revision (1.7) has been prototyped and
confirmed working with its SD/MMC level-shifting. i missed that
bit... so do not wish to waste backer funds by potentially making a
mistake on the micro-desktop 1.7 PCB that's *duplicated* on laptop
PCB1.
http://hands.com/~lkcl/eoma/laptop_15in/pcb4
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
http://rhombus-tech.net/rock_chips/rk3288/news/
i now have 2 assembled PCBs with the exact same "fault" - which after
talking to paulk and akaka on #linux-rockchip i *may* have a lead on
how to get the DDR3 RAM up and running properly. we believe it's down
to the impedance control register (ZQCR) which is being hard-coded in
u-boot-rockchip rather than being allowed to "train". those values
are suited for 6-layer 1.6mm PCBs - the impedance of tracks when you
have an 8-layer 1.2mm PCB are *half* what they are for 6-layer 1.6mm
PCBs.
l.
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
Hi Luke,
I just read your last update [1], even though it is already three weeks old.
It was a good and interesting read - thank you for that!
There you mentioned the bad shape of Free Software in the fields of CNC milling.
In general I have to agree. But I think, it is not as bleak as you experienced
it.
There is indeed a usable toolchain of Free Software for 2D or 3D design,
toolpath generation and machine control. Sadly especially the toolpath
generation process is far from being as fast and full of features as it should
be.
Personally I maintain PyCAM [2] (a toolpath generator).
The toolpath generators are the weak link between a range of good libre 3D and
2D design software and linuxcnc [3] - an excellent and mature software for
machine control.
Feel free to contact me, if this topic is of any practical interest for you
right now.
Cheers,
Lars
[1]
https://www.crowdsupply.com/eoma68/micro-desktop/updates/progress-physics-t…
[2] http://pycam.sf.net/
[3] http://linuxcnc.org/